PCB CONTROLLED IMPEDANCE, some simple notes.
The antenna cable to a TV is most commonly coaxial; with an inner conductor insulated from the outer cylindrical conductor (shield). The dimensions of the conductors and insulator, and the electrical characteristics of the insulator are carefully controlled in order to determine the shape, strength and interaction of the electrical fields, and in turn the electrical impedance of the cable.
Likewise many different trace configurations are used in the PCB industry to achieve controlled impedance.
Controlled impedance PCB’s emulate controlled impedance cables, where the coax shield may be represented by a Cu-plane, the insulator represented by the laminate and the conductor is the trace. As in a cable dimensions and materials determine the impedance.
These parameters must be carefully predicted in the design and controlled in the manufacturing process to ensure that specifications are met.
Impedance (measured in Ohms, Ω) is not to be confused with resistance (also Ohms, Ω). Resistance is a DC characteristic, while impedance is an AC characteristic of importance with increasing signal frequencies.
Why do we need controlled impedances?
We need controlled impedances because the function of a wire or trace is to transfer signal power. Maximum signal power is achieved with matching impedances. The same considerations apply to signal transfer through traces on a PCB. When board traces carry high frequency signals, care must be taken to design traces matching the impedance of the driver and receiver devices. The longer the trace or the higher the frequencies, the higher is the need to control the trace impedance.
PCB manufacturers control impedance by varying the dimensions and spacing of the trace or laminate.
We at Elmatica experience an increase in demands for multilayers with controlled impedance. An estimated 80 % of the multilayer PCB’s with eight layers or more are designed with controlled impedance.
In near future virtually all PCB’s will likely include at least some impedance requirements. The following diagrams show some of the many configurations PCB designers can use. When looking at the stack-up of a multiplayer PCB, remember that controlled impedances are shielded by planes. For this reason you need only consider the laminate thicknesses between the planes on either side of the trace when it is inside the PCB.
These diagrams are examples of some of the many different configurations that PCB designers can use. When you are looking at the stack up of a multiplayer PCB, remember that controlled impedances are shielded by planes and for this reason, you only need consider the laminate thicknesses between the planes on either side of the trace when it is inside the PCB.
As the operating speed of electronic circuits has increased, so has the need for PCBs to have controlled impedances and the majority of PCB manufacturers are producing them.
As described earlier, if the value of controlled impedance is incorrect, it can be very difficult to identify the problem once the PCB is assembled. Since the impedance depends on many parameters (trace width, trace thickness, laminate thickness, etc.) the majority of PCBs are currently 100% tested for controlled impedance. However the testing is not normally performed on the actual PCB but on a test coupon manufactured at the same time and on the same panel as the PCB. Sometimes the test coupon is integrated into the main PCB.
But, on most PCBs, the impedance is calculated during pre-production, and not controlled through use of coupons. General tolerance on the impedance
The typical test coupon is a PCB approximately 200x30mm with exactly the same layer and trace construction as the main PCB. It has traces that are designed to be the same width and on the same layer as the controlled impedance traces on the main PCB.
When the artwork is produced, the same aperture code (D-code) used for the controlled impedance traces is used to produce the test traces on the coupon. Since the coupon is fabricated at the same time as the main PCB the coupon’s traces will have the same impedance as those on the main PCB. All planes are included on the coupon and they are interconnected on the coupon only, to ensure that test results are valid. It is necessary to include a void around the coupon on the reference planes so as not to affect the connectivity of the PCB itself if BBT (BareBoard Test) occurs whilst still on the panel
Usually one coupon is made at the end of each panel to ensure that the coupon is representative of the whole panel. I.e. testing the 2 coupons will verify to a high confidence level that there are no differences in trace width, trace thickness, laminate height, etc. over the whole panel.
In addition to the usual PCB specifications, the PCB designer should specify:
Which layers contain controlled impedance traces
The impedance(s) of the trace(s) (there can be more than one value of impedance trace per layer)
Separate aperture codes for controlled impedance traces e.g. 4 mil non controlled impedance trace and 4 mil controlled impedance trace.
1. the width (w) of the controlled impedance trace or
2. the laminate thickness (h) adjacent to the controlled impedance trace.
In case 1, where trace width (w) is specified, the manufacturer will adjust the laminate thick-ness (h) to give the correct value of impedance.
In case 2 where the laminate thickness (h) is specified, the manufacturer will adjust the trace width (w) to achieve the value of impedance.
Some configurations (differential, coplanar) may have more than one parameter that can be varied to obtain the specified impedance.
Simple DESIGN GUIDELINES.
The following guidelines should be used for designing and specifying differential stripline configurations:
No special fabrication requirements are required for differential transmission lines.
A higher tolerance will be required when the differential lines are on adjacent layers that are separated by prepreg.
Broadside-coupled striplines should ideally be used on a core. Try to avoid having prepreg between them. This is required to control the z-axis alignment
between the two signal layers.
Specify the design trace-to-trace spacing for correct impedance modelling.
Your manufacturer should be involved in the pre-layout phase to assist with the line width and spacing calculations.
Give the differential pairs a different aperture than non-differential traces. This will make it easier for the manufacturer to adjust line widths
during the tooling process.
MINIMIZING IMPEDANCE COST
Using the following simple guidelines will reduce the cost impact when specifying controlled impedance PCB’s:
Only specify the impedance on the layers where it is actually required.
Route all of the controlled impedance traces onto the same layers.
Specify a +/- 10% tolerance when possible.
Do not specify all of the physical dimensions for the trace. Just specify the required impedance and allow the manufacturer to determine
the physical parameters. Try to just specify the trace width and tolerance based on the PCB routing.
Do not require impedance test coupons. This may reduce the panel utilization and will require each PCB to be manually tested. Impedance will
be calculated with the values set by the manufacturer.
Allow panel level testing, without individual PCB serialization, to verify the PCB impedance. Panel testing has been shown to provide sufficient results
comparable to individual PCB testing.
Elmatica source for PCB Controlled Impedance is as it is for the rest of the PCB business, www.polarinstruments.com
See .pdf file for full article with illustrations..
josse Elmatica Dec. 2008